Product: IBM Releases Cell BE SDK, Version 1.1

IBM has announced that version 1.1 of its SDK for the Cell Broadband Engine, or Cell BE, has been released. The SDK is a complete Cell BE development environment, including Linux kernel for Cell BE blades, Linux support libraries, tool chains, system simulator, source code for libraries and samples, and a new, fully-integrated installation. Cell BE is the first of the tech giant's own hardware to use the newly developed Cell chip, which was co-created by Sony, Toshiba, and IBM, and will first debut in Sony's PlayStation 3 console, due out in November. IBM Cell BE SDK Version 1.1 contains a number of significant enhancements over Versions 1.0 and 1.0.1, and it completely replaces those previous SDKs. These enhancements include the Linux kernel (2.6.16) and library support for Cell BE-based blade servers contain two Cell Broadband Engine Processors for a total of 16 SPEs; added C++ support to the XL C compiler for PPU applications; added support for GDB server running in both PPEs and SPEs; and an improved installation that uses a completely revamped process and RPMs. In addition, the new version's GNU GCC compiler for PPU and SPU programs has been upgraded to Version 4.0.2. Other changes with version 1.1 include an upgrade to the Binutils to version 2.16.1, additions and updates to the libraries and samples include a new sample that ray traces the quaternion Julia Set, and added support for Non-Uniform Memory Access (NUMA) that improves the performance of memory accesses between SPEs. The IBM Library and Samples Source Code package contains working examples and libraries that demonstrate programming techniques and performance of Cell BE Architecture. For example, a variety of application-oriented libraries, including Fast Fourier Transform (FFT), image, audio resample, math, game math, intrinsics, matrix operation, multi-precision math, noise generation, oscillator, surface, synchronization, and vector, are included in order to demonstrate the versatility of CBE architecture. Additional samples and workloads demonstrate how a programmer can exploit the on-chip computational capacity; included is a large FFT workload that showcases a performance that is more than an order of magnitude higher than a traditional processor.